Low cost high resolution scheme for signal process

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The low-cost and high-resolution scheme of resolver signal processing

resolver contains three windings, namely one rotor winding and two stator windings. The rotor winding rotates with the motor, the stator winding position is fixed, and the two stators are at an angle of 90 degrees to each other (as shown in Figure 1). In this way, the winding forms a transformer with angle dependent coefficient

the sinusoidal carrier wave applied to the rotor winding is coupled to the stator winding, and the output of the stator winding is amplitude modulated related to the angle of the rotor winding. Due to the installation position, the phase difference of the modulated output signals of the two stator windings is 90 degrees

the angle position information of the motor can be obtained by demodulating the two signals. First, the pure sine wave and cosine wave should be received, and then the tangent value of the angle can be obtained by dividing them. Finally, the angle value can be obtained through the "arctangent" function. Generally, DSP is used for arithmetic processing, so sine and cosine waves need to be digitized. At present, there are several special products with these functions on the market, but their prices are expensive. For most applications, other alternatives need to be sought

(1) comparison, but the so-called imports should be all low-carbon steel and cast iron imported from abroad, shrinkage deformation and damage phenomenon

Figure 1: resolver and its related signals

at present, one of the most commonly used methods is to detect the peak value of carrier frequency in the output signal to trigger analog-to-digital converter (ADC). If the modulated signal is always converted at this point in time, the carrier frequency will be eliminated. Incremental accumulation due to higher resolution( Δ- Σ) ADC always samples the signal integrally within a period of time, so it will not only convert the peak voltage, so it needs to use TI ads7861 or ads8361 to approach ADC step by step, and the resolution is also limited to 12~14 bits

this method also requires several circuit modules, which must generate appropriate sinusoidal carriers, trigger the conversion process at the appropriate time point, and ADC must synchronously convert the signal. This not only increases the cost, but also has limited resolution

theoretical basis of the new concept

the new concept uses the oversampling method and moves the demodulation to the digital domain. The oversampling of the modulated signal uses two channels Δ- Σ modulator ads1205 and digital filter chip amc1210 are used for demodulation and decimation of modulator output

the modulator only generates bit streams, which is different from the digital concept in ADC. In order to output a digital signal equivalent to the analog input voltage, a digital filter must be used to process the bit stream. Sine filter is a kind of filter which is very simple, easy to build and has the least hardware requirements

signals whose frequency is an integral multiple of the modulator clock frequency divided by the oversampling rate will be suppressed. These suppressed frequency points are called notch. In this new concept, the principle of setting the extraction rate of the integrator is to make the carrier frequency fall into a certain notch frequency. However, the signal needs to be demodulated first, otherwise the angle information will be ignored together with the carrier frequency. This task is completed by amc1210

amc1210 has four channels, and each channel provides a filter structure

amc1210 can also be used to measure current. In this example, we use the comparator filter for overcurrent protection, which can achieve fast response at low resolution (as shown in the blue part in the figure). The yellow part can produce higher resolution output at lower sampling rate, which is used for the control loop. According to the needs of applications, sinusoidal filters and integrators can be used here to optimize the structure of filters. In addition, the channel can also be used for filtering and demodulation

first, the sinusoidal filter in amc1210 filters the bit stream of the modulator to convert it into medium resolution and medium rate data words. For ads1205, the sliding surface of the inlaid steel plate in contact with the lining plate and the dovetail groove surface on the lining plate should be kept clean. The oversampling rate (OSR) of the most efficient third-order sinusoidal filter is 128. When the oversampling rate exceeds 128, the signal-to-noise ratio increases by only 3dB every time the OSR is doubled. The same effect can be achieved by using the integrator after the demodulation process, and the delay time of the filter can be shortened

when OSR is set to 128, a 14 bit digital modulation signal will be generated, and its data rate is:

in this equation, Fmod represents the clock frequency of the modulator, which is reduced to half of the original in the modulator. In the following example, when the clock signal frequency is 32.768mhz, the data rate of the third-order sinusoidal filter is 128khz

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